Huawei pitches Tau Scaling and LogicFolding as a sanctions-era chip path
Huawei says its Tau Scaling Law and LogicFolding architecture could deliver 1.4nm-equivalent transistor density by 2031, with a route into Ascend AI chips and data-center clusters.
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Huawei's semiconductor announcement should be treated as an ambitious roadmap claim, not a proven production breakthrough, but it belongs in the feed. In a May 25 announcement tied to IEEE ISCAS, Huawei introduced the Tau Scaling Law and LogicFolding as a way to improve transistor density and system performance through co-optimization across devices, circuits, chips, and systems. Huawei says high-end chips designed with the approach are expected to reach transistor density equivalent to 14 angstrom, or 1.4nm, processes by 2031. Coverage from Tom's Hardware and regional tech outlets frames this as a sanctions-era alternative to conventional EUV-dependent node scaling and says Huawei aims to extend the architecture beyond Kirin chips into Ascend AI processors and data-center clusters. The important caveat is that Huawei has announced a direction and claims, not independently benchmarked 1.4nm-class production silicon.
Key details: Huawei, Tau Scaling Law, LogicFolding, IEEE ISCAS 2026, May 25, 2026, 14 angstrom / 1.4nm-equivalent target, 2031 roadmap, Ascend AI processors.
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